With the advancement in the miniaturization process technology, it has become feasible to use a gate length of 0.1 μm or less in an ultra high speed semiconductor device. Generally, the operating speed of a semiconductor device is improved with the miniaturization thereof. However, in such a highly miniaturized semiconductor device, the thickness of a gate insulating film needs to be reduced in proportion to the reduction in the gate length in accordance with the scaling rule.
In case the gate length is reduced to 0.1 μm or less, the thickness of the gate insulating film needs to be 1-2 nm or less on a conventional thermal oxide film basis. However, such an extremely thin gate insulating film cannot avoid the problem of increased gate leakage current resulting from an increase in the tunneling current.
Accordingly, it has been proposed to employ a high-k dielectric material having a substantially higher dielectric constant than the thermal oxide film for use as a gate insulating film. Specifically, Ta2O5, Al2O3, ZrO2, HfO2, ZrSiO4, HfSiO4 and the like have been tried for such purpose, as they are small in terms of the thickness electrically equivalent to SiO2 despite their large actual thickness. With the use of such a high-k dielectric material, a gate insulating film with a physical film thickness of about 10 nm can be employed even when the gate length for use in an ultra high speed semiconductor device is very short, e.g., 0.1 μm or less, thereby preventing the gate leakage current resulting from the tunneling effect.
A Ta2O5 film is known to be formed through a CVD process from gaseous source materials of Ta(OC2H5)5 and O2. Typically, the CVD process is conducted in a depressurized environment and at about 480° C. or higher temperature. The Ta2O5 film formed in such manner is then subject to a heat treatment in the presence of oxygen for crystallization and this compensates for the oxygen deficiency in the film. The Ta2O5 film in its crystallized state possesses a large dielectric constant.
To enhance a carrier mobility in a channel region, it is preferable to interpose an extremely thin base oxide film having the thickness of 1 nm or less, preferably 0.8 nm or less, between a high-k dielectric gate oxide film and a silicon substrate. The base oxide film needs to be very thin since the merit of employing the high-k dielectric film as a gate insulating film might be lost otherwise. Such an extremely thin base oxide film is required to cover the surface of the silicon substrate uniformly, without forming defects such as interface states.
In FIG. 1, a sketchy diagram of a high speed semiconductor device 10 is presented.
Referring to FIG. 1, the semiconductor device 10 is formed on a silicon substrate 11. A high-k dielectric gate insulating film 13 such as Ta2O5, Al2O3, ZrO2, HfO2, ZrSiO4 or HfSiO4 is placed on a thin base oxide film 12 overlaying the silicon substrate 11. A gate electrode 14 is formed on the high-k dielectric gate insulating film 13.
In order to make the high-k dielectric film 13 function as it is supposed to on the base oxide film 12 in the semiconductor device 10, a heat treatment is needed as well as an oxygen deficiency compensation so that the high-k dielectric film in a deposited state is crystallized. Problem arises with such heat treatment on the high-k dielectric film 13 due to the increase in the film thickness of the base oxide film 12.
One of the reasons for the increase in the film thickness of the base oxide film following the heat treatment is thought to be due to the formation of a silicate layer resulting from a mutual diffusion between the silicon contained in the base oxide film 12 and a metal in the high-k dielectric film 13. Such an increase in the film thickness of the base oxide film 12 poses a very serious problem especially when the film thickness of the base oxide film 12 needs to be reduced to a level equivalent to several atomic layers or less, a preferred range of thickness for a base oxide film.
To suppress the increase in the thickness of the base oxide film, therefore, it has been proposed to nitride the surface of the base oxide layer to form an oxynitride film. FIG. 2 presents a sketchy structure of a semiconductor device 20 wherein the base oxide film surface is nitrided. In the drawing, the components identical to those in the semiconductor device 10 of FIG. 1 are indicated with the same reference numerals and explanations thereof will not be repeated.
In FIG. 2, on the surface of the base oxide film layer 12, nitrogen N is doped while maintaining the flatness of the interface between the silicon substrate 11 and the base oxide film 12 to form an oxynitride film 12A. This oxynitride film 12A can stop the formation of the silicate layer, and thereby prevent the increase in the thickness of the base oxide film 12.
However, the productivity can be adversely affected in this case due to the fact that the nitriding process has to be newly added to form the oxynitride film 12A. In addition, it is very difficult to control the nitrogen concentration in the thickness direction of the base oxide film layer 12. Furthermore, if the nitrogen concentration is enriched near the interface between the base oxide film 12 and the silicon substrate 11, formation of interface states may develop and problems such as carrier capturing and formation of leakage current path may arise.